The development of semiconductor switching technology for high power applications in motor drive circuits, appliance controls and lighting ballasts, for example, began with the bipolar junction transistor. As the technology matured, bipolar devices became capable of handling very large current densities in the range of 200-300 A/cm.sup.2, with blocking voltages of 600 V.
Despite the attractive power ratings achieved by bipolar transistors, there exist several fundamental drawbacks to the suitability of bipolar transistors for all high power applications. First of all, bipolar transistors are current controlled devices. Accordingly, a large control current into the base, typically one fifth to one tenth of the collector current, is required to maintain the device in an operating mode. Even larger base currents, however, are required for high speed forced turn-off. These characteristics make the base drive circuitry complex and expensive. The bipolar transistor is also vulnerable to breakdown if a high current and high voltage are simultaneously applied to the device, as commonly required in inductive power circuit applications, for example. Furthermore, it is difficult to parallel connect these devices since current diversion to a single device occurs at high temperatures, making emitter ballasting schemes necessary.
The power MOSFET was developed to address this base drive problem. In a power MOSFET, a bias voltage for turn-on and turn-off control is applied to a gate electrode. The gate electrode is separated from the device's active area by an intervening insulator, typically silicon dioxide. Because the gate is insulated from the active area, little if any gate current is required in either the on-state or off-state. The gate current is also kept small during switching because the gate forms a capacitor with the device's active area. Thus, only charging and discharging current ("displacement current") is required. The high input impedance of the gate, caused by the insulator, is a primary feature of the power MOSFET. Moreover, because of the minimal current demands on the gate, the gate drive circuitry and devices can be easily implemented on a single chip. As compared to bipolar technology, the simple gate control provides for a large reduction in cost and a significant improvement in reliability.
These benefits are offset, however, by the high on-resistance of the MOSFET's active region, which arises from the absence of minority carrier injection. Indeed, the drift region of the power MOSFET represents a high series resistance during current conduction. As a result, the device's operating forward current density is limited to relatively low values, typically in the range of 10 A/cm.sup.2, for a 600 V device, as compared to 200-300 A/cm.sup.2 for the bipolar transistor.
On the basis of these features of power bipolar transistors and MOSFET devices, it is apparent that hybrid devices embodying a combination of bipolar current conduction with MOS-controlled current flow would provide significant advantages over single technologies such as bipolar or MOSFET alone. Thus, in the Insulated Gate Bipolar Transistor (IGBT), disclosed in an article by coinventor B. J. Baliga, M. S. Adler, R. P. Love, P. V. Gray and N. Zommer, entitled "The Insulated Gate Transistor: A New Three Terminal MOS Controlled Bipolar Power Device," IEEE Trans. Electron Devices, ED-31, pp. 821-828 (1984), on-state losses were shown to be greatly reduced when compared to power MOSFETs. This was caused by the conductivity modulation of the IGBT's drift region during the on-state.
Although gate-controlled bipolar transistors, such as the IGBT, represent an improvement over using bipolar or MOSFET devices alone, even lower conduction losses can be expected by using a thyristor. This is because thyristors offer a higher degree of conductivity modulation and a lower forward voltage drop when turned on. Consequently, the investigation of thyristors is of great interest so long as adequate methods for providing forced gate turn-off can also be developed. As will be understood by one skilled in the art, a thyristor in its simplest form comprises a four-layer P1-N1-P2-N2 device with three P-N junctions in series: J1, J2, and J3, respectively. The four layers correspond to the anode (P1), the first base region (N1), the second base or P-base region (P2) and the cathode (N2), respectively. In the forward blocking state, the anode is biased positive with respect to the cathode and junctions J1 and J3 are forward biased and J2 is reversed-biased. Most of the forward voltage drop occurs across the central junction J2. In the forward conducting state, all three junctions are forward biased and the voltage drop across the device is very low and approximately equal to the voltage drop across a single forward biased P-N junction.
An inherent limitation to the use of thyristors for high current applications is sustained latch-up, however, arising from the coupled P1-N1-P2 and N1-P2-N2 bipolar transistors which make up the four layers of the thyristor. This is because sustained thyristor latch-up can result in catastrophic device failure if the latched-up current is not otherwise sufficiently controlled by external circuitry or by reversing the anode potential. Sustained latch-up can occur, for example, when the summation of the current gains for the thyristor's regeneratively coupled P1-N1-P2 and wide base P1-N2-P2 transistors exceeds unity. An alternative to providing external circuitry or reversing the anode potential to obtain turn-off, however, is to use a MOS-gate for controlling turn-on and turn-off.
Several methods for obtaining MOS-gate control over thyristor action, including the parasitic latch-up mechanism, exist. For example, in the MOS-controlled thyristor (MCT), turn-off is provided by shorting the emitter-base junction of the N-P-N transistor to thereby produce a reduction in gain. This raises the holding current of the thyristor to above the operating current. Accordingly, an MCT structure has been reported which utilizes an P-channel MOSFET integrated into the P-base region of a thyristor with a N.sup.- drift region. This device is described in an article by V. A. K. Temple, entitled "The MOS Controlled Thyristor," published in IEDM Technology Digest, Abstract 10.7, pp. 282-285, (1984). However, the maximum controllable current density, which is a direct measure of a device's ability to turn-off, is limited by the MOSFET inversion-layer channel resistance and other resistances in the base region. Because of the lower mobility for holes in silicon, MCT's built from N-type high-voltage drift layers exhibit poor current turn-off characteristics.
Other examples of MOS-gated thyristors include the depletion-mode thyristor (DMT), which overcame many of the drawbacks associated with the MCT. In the DMT, a depletion mode MOSFET is placed in series with the base of the P-N-P transistor. Accordingly, once the thyristor is turned-on, current flow can be shut off by application of a negative gate bias. Thin eliminates the base drive by pinching off the base current to the P-N-P transistor and shuts off the device. Both the MCT and DMT exhibit low forward drop and high on-state current densities.
In another device, described in an article entitled "The MOS-Gated Emitter Switched Thyristor, " by coinventor Baliga, published in IEEE Electron Device Letters, Vol. 11, No. 2, pp. 75-77, February, 1990, turn-on is achieved by forcing the thyristor current to flow through an N-channel MOSFET and floating emitter integrated within the P-base region. This article is hereby incorporated herein by reference. As will be understood by one skilled in the art, the length of the floating N.sup.+ emitter region controls the holding and triggering current for the device. Turn-off of the emitter switched device (EST) is accomplished by reducing the gate voltage on the MOSFET to below the threshold voltage. This cuts off the floating N.sup.+ region from the cathode and shuts-off the device.
Unfortunately, the integration of a MOSFET in the P-base region causes a parasitic thyristor to be formed. If this thyristor turns-on, the EST can no longer be turned off by reducing the MOSFET gate voltage to zero. Turn-on of the parasitic thyristor is initiated by the onset of electron injection from the N.sup.+ emitter of the parasitic thyristor when forward biased, and is dictated by the resistance of the P-base under the N.sup.+ emitter region. Accordingly, the likelihood that parasitic latch-up will occur can be reduced if the P-base resistance is lowered by making the length of the N.sup.+ emitter region small and by using a P.sup.+ diffusion to reduce the sheet resistance of the P-base.
More recently, a base resistance controlled thyristor (BRT) was described in U.S. Pat. No. 5,099,300, to Baliga, and an article entitled "A New MOS-Gated Power Thyristor Structure with Turn-Off Achieved by Controlling the Base Resistance," by coinventors M. Nandakumar and B. J. Baliga, and M. Shekar, S. Tandon, and A. Reisman, IEEE Electron Device Letters, Vol. 12, No. 5, pp. 227-229, (1991), both of which are hereby incorporated herein by reference. The principle of operation involves modulation of the lateral P-base resistance of the thyristor using MOS gate control. Operational BRTs with 600-volt forward blocking capability, such as the one shown in FIG. 1 in three dimensions, have been developed. FIG. 1 is a reproduction of FIG. 1 from the aforesaid Nandakumar, et al. article. The BRT can be turned-off by application of a negative bias to a diverting means to thereby reduce the resistance of the P-base by providing a parallel path for current flow to the cathode. The reduction in P-base resistance results in an increase in the device's holding current to above the operational current level and shuts-off the device.
It will be understood by one skilled in the art that for high current applications, multiple discrete thyristors can be connected in parallel and operated with single MOS-gate control. Moreover, in place of using discrete thyristors, multiple thyristor cells can be integrated by replicating unit thyristor cells across a semiconductor substrate. Accordingly, the current carrying capability of an integrated thyristor can be scaled upward in proportion to the number of cells on a semiconductor substrate.
Because it is expected that each of the thyristor cells performs identically regardless of their location on the semiconductor substrate, the maximum controllable current density should be the same for each cell. This value is of considerable importance since it provides the maximum turn-off current density for a cell. However, experimental results by the inventors have confirmed that as the multicelled thyristor is scaled upwards, the maximum controllable current does not scale proportionately as expected. Accordingly, it would be advantageous to provide an integrated multicelled switching device capable of being proportionally scaled to higher currents without a decrease in the maximum controllable current density per unit cell.